1. Field of the Invention
The present invention relates to a method for manufacturing a silicon carbide semiconductor apparatus.
2. Description of Related Art
A method for polishing an SiC wafer has been proposed in, for example, JP-A-2006-121111 (corresponding to U.S. Pat. No. 6,835,120) and JP-A-H10-144638. Specifically, JP-A-2006-121111 discloses a polishing apparatus, in which a polishing cloth is attached to a polishing platen, and a wafer holding table is located above the polishing cloth. An SiC wafer is placed on the polishing cloth, and placed between the polishing cloth and the wafer holding table.
The polishing apparatus can be used as follows. Such an SiC wafer is prepared that a trench is formed in one surface of the SiC wafer and a trench filling layer is formed in the trench. A groove formed in a surface portion of the trench filling layer is flattened and eliminated.
In the above operation, the SiC wafer is interposed between the polishing cloth and the wafer holding table so that the trench filling layer of the SiC wafer faces the polishing cloth. The wafer holding table and the polishing platen are respectively rotated while a chemical solution including abrasive grains is being dropped from an injector located above the polishing cloth. Thereby, a surface portion of the trench filling layer of the SiC wafer is flattened and polished while the SiC wafer is being pressed to the polishing cloth by the wafer holding table.
JP-A-H10-144638 discloses the followings. A pattern for step adjustment is disposed in a periphery of an element region of a semiconductor wafer to flatten irregularities on a film surface. The film surface is target for planarization by polishing or grinding. Thereby, a pressure in grinding or polishing can become constant, and planarizing is uniformly performed.
Since an SiC wafer is hard next to diamond, even if an oxidation film that functions as stopper is disposed on an SiC wafer, the oxidation film is abraded prior to the SiC wafer. Accordingly, in planarizing and polishing an SiC wafer, it is difficult to selectively polish the SiC wafer by using an oxidation film that functions as a stopper. Thus, the planarizing will be performed without using the oxidation film that functions as a stopper.
When the groove of the trench filling layer of the SiC wafer is attempted to be flattened by using the polishing apparatus according to the JP-A-2006-121111, if a step exists on one surface of the SiC wafer, it is difficult to planarize the one surface with high accuracy.
Even when a pattern for step adjustment is disposed in a periphery of an element region of a semiconductor wafer in such a manner as disclosed in JP-A-H10-144638, if a semiconductor wafer to be grinded or polished is hard one (e.g., SiC wafer), it is difficult to abrade the SiC wafer so that a step on a surface of the SiC wafer is made small. The above difficulty is similar to the case associated with JP-A-2006-121111.
Moreover, the planarizing of an SiC wafer only by polishing according to the above manners results in the SiC wafer having a periphery portion that is polished more than a center portion. It is difficult to planarize the SiC wafer uniformly.